Development of a Timing Analysis Program for Multiple Clocked Network

This paper describes the development of a timing analysis program for logic networks using both critical path and enumerative trace methods. The program utilizes the dynamic data structure of Pascal and its recursive computing power such that depth first search and breath first search can be carried...

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Bibliographic Details
Published in22nd ACM/IEEE Design Automation Conference pp. 816 - 819
Main Author Chan, E.
Format Conference Proceeding
LanguageEnglish
Published IEEE 1985
Subjects
Clocks
Computational modeling
Computer networks
Computer simulation
Data structures
Delay
Logic design
Space vector pulse width modulation
Timing
Wire
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ISBN0818606355
9780818606359
ISSN0738-100X
DOI10.1109/DAC.1985.1586044

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Summary:This paper describes the development of a timing analysis program for logic networks using both critical path and enumerative trace methods. The program utilizes the dynamic data structure of Pascal and its recursive computing power such that depth first search and breath first search can be carried out for delay calculations in a highly efficient manner. The program detects long and short paths between storage elements, setup and hold time violations of flip-flop, and minimum pulse width violations of clock signals.
ISBN:0818606355
9780818606359
ISSN:0738-100X
DOI:10.1109/DAC.1985.1586044