A 72 Gb/s 2/sup 31/-1 PRBS generator in SiGe BiCMOS technology

A 2/sup 31/-1 72 Gb/s PRBS generator is reported in a 0.13 /spl mu/m SiGe BiCMOS technology with 150 GHz-f/sub T/ HBTs. Variable delays are introduced along the 36 GHz clock path to increase timing margins. A true BiCMOS logic family using NMOS FETs in the clock path is employed throughout the circu...

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Bibliographic Details
Published inISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005 pp. 342 - 602 Vol. 1
Main Authors Dickson, T., Laskin, E., Khalid, L., Beerkens, R., Jingqiong Xie, Karajica, B., Voinigescu, S.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2005
Subjects
BiCMOS integrated circuits
Circuit testing
Clocks
Flip-flops
Germanium silicon alloys
Inductors
Logic
Silicon germanium
Test pattern generators
Topology
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Summary:A 2/sup 31/-1 72 Gb/s PRBS generator is reported in a 0.13 /spl mu/m SiGe BiCMOS technology with 150 GHz-f/sub T/ HBTs. Variable delays are introduced along the 36 GHz clock path to increase timing margins. A true BiCMOS logic family using NMOS FETs in the clock path is employed throughout the circuit, which dissipates 9.28 W from a 3.3 V supply to provide a single-ended output swing of 300 mV at 72 Gb/s.
ISBN:0780389042
9780780389045
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2005.1494009