A 24 GHz phased-array transmitter in 0.18 /spl mu/m CMOS

A fully integrated 4-element phased-array transmitter at 24 GHz with on-chip PAs is implemented in a 0.18 /spl mu/m CMOS process. It has a beam-forming resolution of 10/spl deg/, a peak-to-null ratio of 23 dB, and isolation between paths of 28 dB. Each CMOS PA can deliver up to +14 dBm into a 50 /sp...

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Bibliographic Details
Published inISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005 pp. 212 - 594 Vol. 1
Main Authors Natarajan, A., Komijani, A., Hajimiri, A.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2005
Subjects
Baseband
CMOS technology
Delay
Frequency synthesizers
Impedance matching
Intelligent networks
Stability
Transmitters
Tuning
Voltage-controlled oscillators
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Summary:A fully integrated 4-element phased-array transmitter at 24 GHz with on-chip PAs is implemented in a 0.18 /spl mu/m CMOS process. It has a beam-forming resolution of 10/spl deg/, a peak-to-null ratio of 23 dB, and isolation between paths of 28 dB. Each CMOS PA can deliver up to +14 dBm into a 50 /spl Omega/ load. The transmitter supports a 500 Mb/s QPSK signal and has a bandwidth in excess of 400 MHz. The die size is 6.8/spl times/2.1 mm/sup 2/ and the complete 4-element transmitter, including the 4 on-chip PAs, draws 788 mA from a 2.5 V supply.
ISBN:0780389042
9780780389045
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2005.1493944