High performance ECL gates made by CDI and conventional methods

High performance integrated ECL gates with stage delays in the nanosecond and subnanosecond regions have been fabricated with conventional and collector diffused isolation (CDI) methods (1). These two fabrication techniques are compared on the basis of resulting circuit performance, circuit density,...

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Published in1969 International Electron Devices Meeting p. 36
Main Authors Eckl, D.J., Konkle, K.H., Richardson, F.K., Idzik, S.A., Luce, R.L.
Format Conference Proceeding
LanguageEnglish
Published IRE 1969
Subjects
Circuit optimization
Delay
Fabrication
Integrated circuit yield
Laboratories
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Abstract High performance integrated ECL gates with stage delays in the nanosecond and subnanosecond regions have been fabricated with conventional and collector diffused isolation (CDI) methods (1). These two fabrication techniques are compared on the basis of resulting circuit performance, circuit density, and laboratory yields.
AbstractList High performance integrated ECL gates with stage delays in the nanosecond and subnanosecond regions have been fabricated with conventional and collector diffused isolation (CDI) methods (1). These two fabrication techniques are compared on the basis of resulting circuit performance, circuit density, and laboratory yields.
Author Luce, R.L.
Idzik, S.A.
Eckl, D.J.
Konkle, K.H.
Richardson, F.K.
Author_xml – sequence: 1
  givenname: D.J.
  surname: Eckl
  fullname: Eckl, D.J.
  organization: Massachusetts Institute of Technology, Lexington, Mass
– sequence: 2
  givenname: K.H.
  surname: Konkle
  fullname: Konkle, K.H.
– sequence: 3
  givenname: F.K.
  surname: Richardson
  fullname: Richardson, F.K.
– sequence: 4
  givenname: S.A.
  surname: Idzik
  fullname: Idzik, S.A.
– sequence: 5
  givenname: R.L.
  surname: Luce
  fullname: Luce, R.L.
BookMark eNp9ybsOgjAUANAOOvjaTVzuD4htfNHJATCQ6OZOrvQCTegtKcSEv3dxdjrDWYoZeyYhtkpGSkl9KLL0GSl90ZGKY6n1Qtxy27TQU6h9cMgVQZY8oMGRBnBoCN4TJGkByAYqzx_i0XrGDhyNrTfDWsxr7Aba_FyJ3T17JfneElHZB-swTKU6Xc86lsf_-wUZtTOD
ContentType Conference Proceeding
DBID 6IE
6IL
CBEJK
RIE
RIL
DOI 10.1109/IEDM.1969.188099
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume
IEEE Xplore All Conference Proceedings
IEL
IEEE Proceedings Order Plans (POP All) 1998-Present
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Xplore Digital Library
  url: https://proxy.k.utb.cz/login?url=https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
EndPage 36
ExternalDocumentID 1475980
Genre orig-research
GroupedDBID 6IE
6IL
CBEJK
RIE
RIL
ID FETCH-ieee_primary_14759803
IEDL.DBID RIE
IngestDate Thu Jun 29 18:12:24 EDT 2023
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-ieee_primary_14759803
ParticipantIDs ieee_primary_1475980
PublicationCentury 1900
PublicationDate 19690000
PublicationDateYYYYMMDD 1969-01-01
PublicationDate_xml – year: 1969
  text: 19690000
PublicationDecade 1960
PublicationTitle 1969 International Electron Devices Meeting
PublicationTitleAbbrev IEDM
PublicationYear 1969
Publisher IRE
Publisher_xml – name: IRE
Score 2.337724
Snippet High performance integrated ECL gates with stage delays in the nanosecond and subnanosecond regions have been fabricated with conventional and collector...
SourceID ieee
SourceType Publisher
StartPage 36
SubjectTerms Circuit optimization
Delay
Fabrication
Integrated circuit yield
Laboratories
Title High performance ECL gates made by CDI and conventional methods
URI https://ieeexplore.ieee.org/document/1475980
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwY2BQAdbR5mkmiam6RkmgLTkWRom6iYnmSbqWFsAUlWxpDqx1QZuTff3MPEJNvCJMI5gYdOB7YVJTU8GLz1L1QEzwXH5KfnIpaKhM3xB0OJ0FsIPObGFgBNmrBZt5NLDU93R18dUDnfaiBzpjDHSYK9J9KeDqwk2AwRdmEWSVSLZeaUmSXnIV2hmMxLpEkEEUsTFPIQBe5QgxMKXmiTDYg9ZqKBQgdgAouDr7KICGx4oVchNTUhWSKhWcXTwVEvNSFJAXmStAbo8uFmWQdnMNcfbQBTkgvgBy_EQ81G5jMQaWvPy8VAkGhVTzNAPDZDOLtERgf83ExNQiNTEVSCabGyaBrhizkGQQwWaCFHZhaQYuUChCxhlkGFhKikpTZYE1b0mSHDjIAe_SiIE
link.rule.ids 310,311,786,790,795,796,802,4069,4070,27956,55107
linkProvider IEEE
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV07T8MwED5VZYAJUIuA8vDASNKkpLUzMaSpEkgqhiJ1i-zksiDSqk0G-PX4EvoQ6sBiWR58J8vSp3t83wE8aIzmuSPRGCii5IiBNKTkynCF_lGpyzXqEjk5no6Cd-dlPpy34HHLhUHEuvkMTdrWtfxskVaUKuvbJE4ndIB-pHHe4g1ba1N7tNx-6I9jk_ReTFIZIznXvYkpNWBMTiHemGr6RD7MqlRm-v1HhfG_vpxBd0fNY29b0DmHFhYdeKZuDbbccQCY70WMEmRr9ikzZOqLeeOQySJj-23mrJkfve5Cb-LPvMAgB5JlI0CR_Np-uoB2sSjwEhjy3LLTkciljtgcZyhQol5TbisaMiauoHPohuvDx_dwHMziKInC6WsPTuhFm6zDDbTLVYW3GodLdVc__w9Qr4vV
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=1969+International+Electron+Devices+Meeting&rft.atitle=High+performance+ECL+gates+made+by+CDI+and+conventional+methods&rft.au=Eckl%2C+D.J.&rft.au=Konkle%2C+K.H.&rft.au=Richardson%2C+F.K.&rft.au=Idzik%2C+S.A.&rft.date=1969-01-01&rft.pub=IRE&rft.spage=36&rft.epage=36&rft_id=info:doi/10.1109%2FIEDM.1969.188099&rft.externalDocID=1475980