The address translation unit of the data-intensive architecture (DIVA) system

• Published in: Proceedings of the 28th European Solid-State Circuits Conference pp. 767 - 770
• Main Authors: Herming Chiueh, Draper, J., Mediratta, S., Sondeen, J.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2002
• Subjects: Bandwidth; Computer architecture; Coprocessors; Data engineering; Integrated circuit interconnections; Memory management; Microprocessors; System buses; System-on-a-chip; Very large scale integration

The Data-Intensive Architecture (DIVA) system incorporates Processing-In-Memory (PIM) chips as smart-memory coprocessors to a microprocessor. This architecture exploits inherent memory bandwidth both on chip and across the system. Thus, performances of pointer-based and sparse-matrix computations as...