Architecture and programming of a multirate digital filter

This paper describes a signalprocessor that is specialized on the realization of single- and multi-rate digital filters. It is designed around a TRW multiplier /accumulator and contains a coefficient- and data-address -computer especially suited to the filter-algorithms. It is programmed in a high l...

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Bibliographic Details
Published inICASSP '83. IEEE International Conference on Acoustics, Speech, and Signal Processing Vol. 8; pp. 427 - 430
Main Author Roethe, N.
Format Conference Proceeding
LanguageEnglish
Published IEEE 1983
Subjects
Algorithms
Arithmetic
Automatic programming
Counting circuits
Delay
Digital filters
High level languages
Random access memory
Read-write memory
Testing
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Summary:This paper describes a signalprocessor that is specialized on the realization of single- and multi-rate digital filters. It is designed around a TRW multiplier /accumulator and contains a coefficient- and data-address -computer especially suited to the filter-algorithms. It is programmed in a high level filter-description language with a syntax resembling PASCAL. A crosscompiler translates these programs directly into the machines microcode. Since the language is limited to constructs, that the machines architecture supports efficiently, the automatically generated microcode is only marginaly less efficient than optimal handwritten code.
DOI:10.1109/ICASSP.1983.1172272