Custom macro design in VLSI bipolar technology

A custom bipolar VLSI microprocessor chip will be discussed. Chip contains 4208 logic circuits, including 14 PLAs and a 13Kb ROM. The loaded average propagation delay per logic stage is 2.0 ns.

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Bibliographic Details
Published in1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Vol. XXV; pp. 56 - 57
Main Authors Coleman, J., Mathews, K., Yee-Ming Ting
Format Conference Proceeding
LanguageEnglish
Published IEEE 1982
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Summary:A custom bipolar VLSI microprocessor chip will be discussed. Chip contains 4208 logic circuits, including 14 PLAs and a 13Kb ROM. The loaded average propagation delay per logic stage is 2.0 ns.
DOI:10.1109/ISSCC.1982.1156367