APA (7th ed.) Citation

Gupta, G., Garg, B., & Bansal, M. (2025, June 5). A Low-Power Reduced Error Lower Part-OR Adder for Multimedia Applications. 2025 International Conference on Electronics, AI and Computing (EAIC), 1-6. https://doi.org/10.1109/EAIC66483.2025.11101480

Chicago Style (17th ed.) Citation

Gupta, Garima, Bharat Garg, and Manu Bansal. "A Low-Power Reduced Error Lower Part-OR Adder for Multimedia Applications." 2025 International Conference on Electronics, AI and Computing (EAIC) 5 Jun. 2025: 1-6. https://doi.org/10.1109/EAIC66483.2025.11101480.

MLA (9th ed.) Citation

Gupta, Garima, et al. "A Low-Power Reduced Error Lower Part-OR Adder for Multimedia Applications." 2025 International Conference on Electronics, AI and Computing (EAIC), 5 Jun. 2025, pp. 1-6, https://doi.org/10.1109/EAIC66483.2025.11101480.