Degradation Analysis of Double Trench-Gate SiC MOSFETs Under Single Surge Current Stress

In this work, the degradation processes and mechanisms of commercial double trench gate SiC MOSFETs under single surge current (SSC) stresses are delved into. Based on comprehensive characterizations on device parameters before/after SSC stresses, we elucidate degradation behaviors exhibited by thes...

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Bibliographic Details
Published in2024 25th International Conference on Electronic Packaging Technology (ICEPT) pp. 1 - 4
Main Authors Zhang, Mowen, Wen, Qijun, He, Liang, Ma, Dezhi, Fang, Shuanzhu, Wang, Zhizheng, He, Zhiyuan, Yang, Jia-Yue, Chen, Yiqiang
Format Conference Proceeding
LanguageEnglish
Published IEEE 07.08.2024
Subjects
body diode
Current measurement
Degradation
degradation mechanism
Logic gates
Loss measurement
MOSFET
SiC MOSFET
Silicon carbide
single surge current
Threshold voltage
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Summary:In this work, the degradation processes and mechanisms of commercial double trench gate SiC MOSFETs under single surge current (SSC) stresses are delved into. Based on comprehensive characterizations on device parameters before/after SSC stresses, we elucidate degradation behaviors exhibited by these MOSFETs. Notably, when SSC reaches the maximum value, the stability of the threshold voltage (Vth) and on-state resistance ( R ds,on ) suggests that the gate oxide for these MOSFETs is not obviously influenced by SSC stresses. Additionally, scanning acoustic microscopy (SAM) analysis confirm the reliability of package. Through directly measuring the I-V characteristics of the body diode, the damage to body diode is identified as the primary cause of device failure, resulting the increase of the drain leakage current (Idss) and the loss in blocking capability. This work contributes usefully to the refinement of surge reliability assessment for SiC MOSFETs.
ISSN:2836-9734
DOI:10.1109/ICEPT63120.2024.10668775