MULTIPROCESSOR SYSTEM

A high performance multiprocessor system in which coherency maintenance, though done by a memory control chip and a processor in the prior art, is carried out by a memory control chip alone, thereby reducing processor load and improving bus efficiency. Coherency maintenance is executed by conflict d...

Full description

Saved in:
Bibliographic Details
Main Authors KUROSAWA, KENICHI, MORIOKA, MICHIO, TAKEWA, HIDEHITO, KOKURA, SHIN, FUKUNAKA, HIDETADA
Format Patent
LanguageEnglish
French
Japanese
Published 17.04.1997
Edition6
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online AccessGet full text

Cover

Be the first to leave a comment!
You must be logged in first