PIPELINE CLOCK DRIVING CIRCUIT, COMPUTING CHIP, HASHBOARD AND COMPUTING DEVICE

• Main Authors: GUO, Haifeng, DUAN, Lianhua, LI, Nan, FAN, Zhijun
• Format: Patent
• Language: Chinese; English; French
• Published: 08.08.2024
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

A pipeline clock driving circuit (200), a computing chip, a hashboard, and a computing device. The pipeline clock driving circuit (200) is used for providing a pulse clock signal for a pipeline (201), and comprises: multiple stages of clock driving circuits (220-1, ..., 220-N), wherein each stage is used for providing a pulse clock signal for a corresponding operational stage (201-N, ..., 201-1) of the pipeline (201); and a clock source (210), which is coupled to an input of a first stage of clock driving circuit (220-1). Each stage of clock driving circuit (220-1, ..., 220-N) comprises: a trigger (230-1, ..., 230-N), which is coupled to an input of the present stage of clock driving circuit (220-1, ..., 220-N); a delay module (240-1, ..., 240-N), which comprises a first delay sub-module (241-1, ..., 241-N), which delays a pulse signal outputted by the trigger (230-1, ..., 230-N) and feeds the delayed pulse signal back to the trigger (230-1, ..., 230-N) as a feedback pulse signal; and a combinational logic mo