STACKED AND NON-STACKED TRANSISTORS WITH DOUBLE-SIDED INTERCONNECTS
A semiconductor structure is provided that includes a stacked transistor including at least one transistor stacked over another transistor and a non-stacked transistor integrated on a same wafer. Both the stacked transistor and the non-stacked transistor include frontside and backside interconnects....
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Main Authors | , , , |
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Format | Patent |
Language | English French |
Published |
13.06.2024
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Subjects | |
Online Access | Get full text |
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Summary: | A semiconductor structure is provided that includes a stacked transistor including at least one transistor stacked over another transistor and a non-stacked transistor integrated on a same wafer. Both the stacked transistor and the non-stacked transistor include frontside and backside interconnects.
L'invention concerne une structure à semi-conducteurs qui comprend un transistor empilé comportant au moins un transistor empilé sur un autre transistor et un transistor non empilé intégré sur une même tranche. Le transistor empilé et le transistor non empilé comprennent chacun des interconnexions avant et arrière. |
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Bibliography: | Application Number: WO2023CN134208 |