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A chip includes a first active region, first gates extending over the first active region in a first direction, wherein the first gates correspond to a first transistor, and second gates extending over the first active region in the first direction, wherein the second gates correspond to a second tr...

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Main Authors ROCHE, Conor, MILLS, Roger Lee, WILLIAMS, Thomas Hua-Min, GRIFFITTS, Benjamin, LEE, Hanil, SHAIK, Khaja Ahmad
Format Patent
LanguageEnglish
French
Published 14.03.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A chip includes a first active region, first gates extending over the first active region in a first direction, wherein the first gates correspond to a first transistor, and second gates extending over the first active region in the first direction, wherein the second gates correspond to a second transistor. La présente invention concerne une puce qui comprend une première région active, des premières grilles s'étendant sur la première région active dans une première direction, les premières grilles correspondant à un premier transistor, et des secondes grilles s'étendant sur la première région active dans la première direction, les secondes grilles correspondant à un second transistor.
Bibliography:Application Number: WO2023US69816