LAMINATE, METHOD FOR MANUFACTURING SAME, AND METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE

• Main Authors: NAKAMURA Junetsu, KOTERA Seigo, TAKENAKA Satoshi
• Format: Patent
• Language: English; French; Japanese
• Published: 07.03.2024
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; LAYERED PRODUCTS; LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT ORNON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM; PERFORMING OPERATIONS; SEMICONDUCTOR DEVICES; TRANSPORTING

This laminate comprises a film-shaped base material and an antistatic layer provided on one surface of the base material. The surface energy of the surface of the base material that is in contact with the antistatic layer is 35-70 mN/m, and the thickness deviation of the antistatic layer is less than 30%. Ce stratifié comprend un matériau de base en forme de film et une couche antistatique disposée sur une surface du matériau de base. L'énergie de surface de la surface du matériau de base qui est en contact avec la couche antistatique est de 35 à 70 mN/m, et l'écart d'épaisseur de la couche antistatique est inférieur à 30 %. この積層体は、フィルム状の基材と、前記基材の一方の面上に設けられた帯電防止層と、を備える積層体であって、前記基材の前記帯電防止層と接する面の表面エネルギーが３５～７０ｍＮ／ｍであり、前記帯電防止層の厚さの偏差が３０％未満である。