MULTI-CORE TEST PROCESSOR, AND INTEGRATED CIRCUIT TEST SYSTEM AND METHOD
A multi-core test processor, and an integrated circuit test system and method. The multi-core test processor comprises a co-test processor synchronization controller (11), a master test processor (12), two or more co-test processors (13) and a test subsystem instruction switcher (17), wherein severa...
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Main Author | |
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Format | Patent |
Language | Chinese English French |
Published |
16.03.2023
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Subjects | |
Online Access | Get full text |
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Summary: | A multi-core test processor, and an integrated circuit test system and method. The multi-core test processor comprises a co-test processor synchronization controller (11), a master test processor (12), two or more co-test processors (13) and a test subsystem instruction switcher (17), wherein several co-test processors (13) are introduced under the master test processor (12). The master test processor (12) hands over test patterns, which need to be tested concurrently, to the co-test processors (13) for execution, so as to complete a test project that is similar to an asynchronous signal match test. After the tests executed by the co-test processors (13) are completed, operation then returns to the master test processor (12) for subsequent testing. Asynchronous concurrent tests at multiple test sites can be realized, thereby improving the testing efficiency. Moreover, when an asynchronous test channel is allocated to each test site, the solution can prevent more idle test channels, thereby improving the utili |
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Bibliography: | Application Number: WO2022CN87319 |