CIRCUIT FOR IMPROVING LINEARITY AND CHANNEL COMPENSATION OF PAM4 RECEIVER ANALOG FRONT END
The present application discloses a circuit for improving the linearity and channel compensation of a PAM4 receiver analog front end, comprising a first stage and a second stage, the first stage comprising first to twentieth transistors, a first resistor, a pair of second resistors, a pair of first...
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Main Authors | , , , , , |
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Format | Patent |
Language | Chinese English French |
Published |
27.10.2022
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Subjects | |
Online Access | Get full text |
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Summary: | The present application discloses a circuit for improving the linearity and channel compensation of a PAM4 receiver analog front end, comprising a first stage and a second stage, the first stage comprising first to twentieth transistors, a first resistor, a pair of second resistors, a pair of first capacitors, and a pair of second capacitors. The ninth and tenth transistors in the first stage circuit are directly connected to a ground terminal, and a electrical connection to a bias current source is removed. Input terminals of the ninth and tenth transistors are connected to output signals of the previous-stage nineteenth and twentieth transistors, so that the ninth and tenth transistors are both input geminate transistors and transistors of the current source, and the overall passing current is limited by the thirteenth and fourteenth transistors, so that the supply voltage of the first stage in which the ninth to fourteenth transistors are located can be made lower.
La présente demande divulgue un circuit d |
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Bibliography: | Application Number: WO2022CN87354 |