WAFER WITH BURIED V-GROOVE CAVITY FOR FIBER COUPLING
A wafer with a buried V-groove cavity, and a method for fabricating V-grooves. In some embodiments, the method includes bonding a first layer, to a top surface of a substrate, to form a composite wafer, the first layer being composed of a first semiconductor material, the substrate being composed of...
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| Main Authors | , , , |
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| Format | Patent |
| Language | English French |
| Published |
16.06.2022
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| Online Access | Get full text |
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| Summary: | A wafer with a buried V-groove cavity, and a method for fabricating V-grooves. In some embodiments, the method includes bonding a first layer, to a top surface of a substrate, to form a composite wafer, the first layer being composed of a first semiconductor material, the substrate being composed of a second semiconductor material, the top surface of the substrate having a cavity, the cavity including a V-groove.
L'invention concerne une tranche dotée d'une cavité à rainure en V enfouie, et un procédé de fabrication de rainures en V. Dans certains modes de réalisation, le procédé consiste à coller une première couche, à une surface supérieure d'un substrat, pour former une tranche composite, la première couche étant composée d'un premier matériau semi-conducteur, le substrat étant composé d'un second matériau semi-conducteur, la surface supérieure du substrat comportant une cavité, la cavité comprenant une rainure en V. |
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| Bibliography: | Application Number: WO2021EP85239 |