METHOD FOR INSPECTING SEMICONDUCTOR DEVICE HAVING FUNCTION OF DETERMINING TRAP SITE INFORMATION, AND DEVICE FOR INSPECTING SEMICONDUCTOR DEVICE

A method for inspecting a semiconductor device is provided. The method for inspecting a semiconductor device may comprise the steps of: preparing a semiconductor device under test; measuring a current signal outputted from the semiconductor device under test; amplifying the current signal; calculati...

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Bibliographic Details
Main Authors LEE, Kook Jin, KIM, Yeon-Su, PARK, Hyunik, KIM, Gyu-Tae, NAM, Sang-Jin, KIM, Do-Yoon, LEE, Jae Woo
Format Patent
LanguageEnglish
French
Korean
Published 14.04.2022
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Summary:A method for inspecting a semiconductor device is provided. The method for inspecting a semiconductor device may comprise the steps of: preparing a semiconductor device under test; measuring a current signal outputted from the semiconductor device under test; amplifying the current signal; calculating an amount of change in the current value over time from the amplified current signal; converting the amount of change in the current value with time into a probability density function with respect to the amount of change in the current value; and extracting information on a trap site of the semiconductor device under test from the probability density function. L'invention concerne un procédé d'inspection d'un dispositif à semi-conducteur. Le procédé d'inspection d'un dispositif à semi-conducteur peut consister : à préparer un dispositif à semi-conducteur testé ; à mesurer un signal de courant émis en sortie par le dispositif à semi-conducteur testé ; à amplifier le signal de courant ; à calculer une quantité de variation de la valeur de courant dans le temps à partir du signal de courant amplifié ; à convertir la quantité de variation de la valeur de courant dans le temps en une fonction de densité de probabilité par rapport à la quantité de variation de la valeur de courant ; et à extraire des informations sur un site de piégeage du dispositif à semi-conducteur testé à partir de la fonction de densité de probabilité. 반도체 소자의 검사 방법이 제공된다. 상기 반도체 소자의 검사 방법은, 피시험 반도체 소자를 준비하는 단계, 상기 피시험 반도체 소자에서 출력되는 전류 신호를 측정하는 단계, 상기 전류 신호를 증폭하는 단계, 증폭된 상기 전류 신호로부터, 시간에 따른 전류 값의 변화량을 계산하는 단계, 상기 시간에 따른 전류 값의 변화량을 전류 값의 변화량에 대한 확률 밀도 함수로 변환하는 단계, 및 상기 확률 밀도 함수로부터, 상기 피시험 반도체 소자의 트랩 사이트에 대한 정보를 추출하는 단계를 포함할 수 있다.
Bibliography:Application Number: WO2021KR13885