PACKAGING METHOD FOR SEMICONDUCTOR STRUCTURE, PACKAGING STRUCTURE, AND CHIP
A packaging method for a semiconductor structure, a packaging structure, and a chip. The packaging method for a semiconductor structure comprises: forming a semiconductor structure on an SOI wafer; depositing, by means of plasma-enhanced chemical vapor deposition (PECVD), silicon oxide on the surfac...
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Main Authors | , , , , , , , , , |
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Format | Patent |
Language | Chinese English French |
Published |
07.04.2022
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Subjects | |
Online Access | Get full text |
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Summary: | A packaging method for a semiconductor structure, a packaging structure, and a chip. The packaging method for a semiconductor structure comprises: forming a semiconductor structure on an SOI wafer; depositing, by means of plasma-enhanced chemical vapor deposition (PECVD), silicon oxide on the surface of the semiconductor structure provided with a trench opening; and performing a subsequent packaging process. By sealing a trench opening of a semiconductor structure by using the characteristic of low step coverage of PECVD, the problem of device failures caused by trench blocking due to subsequent filling of a packaging material is solved.
La présente invention concerne un procédé d'encapsulation pour une structure semi-conductrice, une structure d'encapsulation et une puce. Le procédé d'encapsulation pour une structure semi-conductrice comprend : la formation d'une structure semi-conductrice sur une tranche SOI ; le dépôt, au moyen d'un dépôt chimique en phase vapeur assisté par plasma (PECVD), de l'oxyde de s |
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Bibliography: | Application Number: WO2021CN81449 |