CORE-TO-CORE CACHE STASHING AND TARGET DISCOVERY
A method and apparatus is disclosed for transferring data from a first processor core to a second processor core. The first processor core executes a stash instruction having a first operand associated with a data address of the data. A second processor core is determined to be a stash target for a...
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Main Authors | , , , , |
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Format | Patent |
Language | English French |
Published |
02.12.2021
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Subjects | |
Online Access | Get full text |
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