SEMICONDUCTOR GROWTH SUBSTRATE, SEMICONDUCTOR ELEMENT, SEMICONDUCTOR LIGHT-EMITTING ELEMENT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR GROWTH SUBSTRATE

• Main Authors: JINNO Daiki, DAICHO Hisayoshi
• Format: Patent
• Language: English; French; Japanese
• Published: 17.12.2020
• Subjects: BASIC ELECTRIC ELEMENTS; CHEMICAL SURFACE TREATMENT; CHEMISTRY; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; COATING MATERIAL WITH METALLIC MATERIAL; COATING METALLIC MATERIAL; DIFFUSION TREATMENT OF METALLIC MATERIAL; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL; METALLURGY; SEMICONDUCTOR DEVICES; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION

A semiconductor growth substrate (10) is provided with: an r-plane sapphire substrate (11) in which an r-plane serves as a principal plane; a buffer layer (12) that is formed on the principal plane; a plurality of dielectric masks (13) that are formed on the buffer layer (12); and a nitride semiconductor layer (14) in which an a-plane formed by covering the buffer layer (12) and the dielectric masks (13) serves as a principal plane. L'invention concerne un substrat de croissance de semi-conducteur qui comprend : un substrat de saphir dans le plan r (11) dans lequel un plan r sert de plan principal ; une couche tampon (12) qui est formée sur le plan principal ; une pluralité de masques diélectriques (13) qui sont formés sur la couche tampon (12) ; et une couche semi-conductrice de nitrure (14) dans laquelle un plan a formé par recouvrement de la couche tampon (12) et des masques diélectriques (13) sert de plan principal. ｒ面を主面とするｒ面サファイア基板（１１）と、主面上に形成されたバッファ層（１２）と、バッファ層（１２）上に形成された複数の誘電体マスク（１３）と、バッファ層（１２）および誘電体マスク（１３）を覆って形成されたａ面を主面とする窒化物半導体層（１４）を備える半導体成用長基板（１０）。