COMPUTING ARRAY BASED ON 1T1R DEVICE, OPERATION CIRCUIT, AND OPERATING METHOD
A computing array based on a 1T1R device, an operation circuit, and an operating method. The computing array comprises: a 1T1R array and a peripheral circuit, wherein the 1T1R array is used for implementing an operation and storing an operation result, and the peripheral circuit is used for transmit...
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Main Authors | , , , , |
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Format | Patent |
Language | Chinese English French |
Published |
20.06.2019
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Subjects | |
Online Access | Get full text |
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Summary: | A computing array based on a 1T1R device, an operation circuit, and an operating method. The computing array comprises: a 1T1R array and a peripheral circuit, wherein the 1T1R array is used for implementing an operation and storing an operation result, and the peripheral circuit is used for transmitting data and a control signal so as to control the operation and storage processes of the 1T1R array; the operation circuit is respectively used for implementing a one-bit full adder, a multi-bit ripple-carry adder and an optimized design thereof, a two-bit data selector, a multi-bit carry-select adder, and a multi-bit pre-calculation adder; and the operating method corresponding to the operation circuit respectively completes the corresponding operation and storage processes by means of controlling an initialized resistance state of the 1T1R device, a word line input signal, a bit line input signal and a source line input signal. The integration of computation and storage is realized, the complexity of the integr |
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Bibliography: | Application Number: WO2018CN90247 |