SYSTEM IN PACKAGE (SIP) WITH AN INTEGRATED IN-SITU 3D WAFER LEVEL MONITORING AND CONTROL UNIT

The present invention relates to a System in Package (SiP) with an integrated In-situ 3D wafer level monitoring and control unit arranged to monitor and control performance and reliability of a LED, system on substrate (SoS ) comprising said control unit, a BiCMOS process for making said IC, and a d...

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Bibliographic Details
Main Authors ZHANG, Guo Qi, VAN ZEIJL, Hendrikus Wilhelmus, ESFAHANI, Zahra Kolahdouz
Format Patent
LanguageEnglish
French
Published 13.04.2017
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC HEATING
ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:The present invention relates to a System in Package (SiP) with an integrated In-situ 3D wafer level monitoring and control unit arranged to monitor and control performance and reliability of a LED, system on substrate (SoS ) comprising said control unit, a BiCMOS process for making said IC, and a device comprising said SiP. La présente invention concerne un système en boîtier (SiP) doté d'une unité de surveillance et de commande sur tranche 3D in situ intégrée conçue pour surveiller et commander les performances et la fiabilité d'une DEL, un système sur substrat (SoS) comprenant ladite unité de commande, un procédé de fabrication BiCMOS dudit circuit intégré, et un dispositif comprenant ledit système en boîtier.
Bibliography:Application Number: WO2016NL50688