NON-VOLATILE STATIC RAM AND METHOD OF OPERATION THEREOF

A memory device and array which includes a static random access memory (SRAM) circuit coupled to a non-volatile circuit, such as a ferroelectric-RAM (F-RAM) circuit, in which the F-RAM circuit stores a bit of data from the SRAM circuit during power-out periods, the F-RAM circuit is further coupled t...

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Bibliographic Details
Main Authors CHU, Fan, ALLEN, Judith, ASHOKKUMAR, Jayant, DEVILBISS, Alan, LI, Qidao, VERHAEGHE, Donald
Format Patent
LanguageEnglish
French
Published 22.12.2016
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Summary:A memory device and array which includes a static random access memory (SRAM) circuit coupled to a non-volatile circuit, such as a ferroelectric-RAM (F-RAM) circuit, in which the F-RAM circuit stores a bit of data from the SRAM circuit during power-out periods, the F-RAM circuit is further coupled to bit-line(s) to output the bit of data stored in the F-RAM circuit when operation power is restored L'invention concerne un dispositif de mémoire et un réseau qui comprend un circuit de mémoire vive statique (SRAM) couplé à un circuit non-volatil, tel qu'un circuit de RAM ferroélectrique (F-RAM), dans lequel le circuit F-RAM stocke un bit de données provenant du circuit SRAM pendant des périodes de sortie de puissance, le circuit F-RAM est en outre couplé à une ou plusieurs lignes de bit pour fournir le bit de données stocké dans le circuit F-RAM lorsqu'une puissance de fonctionnement est rétablie.
Bibliography:Application Number: WO2016US16196