LOW LATENCY VARIABLE TRANSFER NETWORK FOR FINE GRAINED PARALLELISM OF VIRTUAL THREADS ACROSS MULTIPLE HARDWARE THREADS
A method and circuit arrangement utilize a low latency variable transfer network between the register files of multiple processing cores in a multi-core processor chip to support fine grained parallelism of virtual threads across multiple hardware threads. The communication of a variable over the va...
Saved in:
Main Authors | , , , |
---|---|
Format | Patent |
Language | English French |
Published |
27.06.2013
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Be the first to leave a comment!