LOW LATENCY VARIABLE TRANSFER NETWORK FOR FINE GRAINED PARALLELISM OF VIRTUAL THREADS ACROSS MULTIPLE HARDWARE THREADS

A method and circuit arrangement utilize a low latency variable transfer network between the register files of multiple processing cores in a multi-core processor chip to support fine grained parallelism of virtual threads across multiple hardware threads. The communication of a variable over the va...

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Bibliographic Details
Main Authors SHEARER, ROBERT, HOOVER, RUSSELL, DEAN, WATSON, ALFRED, COMPARAN, MIGUEL
Format Patent
LanguageEnglish
French
Published 27.06.2013
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