METHOD AND APPARATUS FOR PATTERN COLLAPSE FREE WET PROCESSING OF SEMICONDUCTOR DEVICES

A method is provided for processing a wafer used in fabricating semiconductor devices. The method can comprise forming high-aspect ratio features on the wafer, which is followed by wet processing and drying. During drying, pattern collapse can occur. This pattern collapse can be repaired to allow fo...

Full description

Saved in:
Bibliographic Details
Main Authors WILCOXSON, MARK H, MIKHAYLICHENKO, KATRINA, GALE, GLENN W, FU, QIAN, SYOMIN, DENIS, LIU, SHENJIAN
Format Patent
LanguageEnglish
French
Published 08.12.2011
Subjects
Online AccessGet full text

Cover

Loading…
Abstract A method is provided for processing a wafer used in fabricating semiconductor devices. The method can comprise forming high-aspect ratio features on the wafer, which is followed by wet processing and drying. During drying, pattern collapse can occur. This pattern collapse can be repaired to allow for additional processing of the wafer. In some instance, pattern collapse can be repaired via etching where the etching breaks bonds that can have formed during pattern collapse. L'invention concerne un procédé de traitement d'une tranche, utilisé dans le façonnage des dispositifs à semi-conducteurs. Le procédé peut comporter une étape consistant à former des détails à grand facteur de forme sur la tranche, suivie d'un traitement humide et d'un séchage. Au cours du séchage, un affaissement des motifs peut survenir. Ledit affaissement des motifs peut être réparé pour permettre un traitement supplémentaire de la tranche. Dans certains cas, l'affaissement des motifs peut être réparé par attaque chimique, lorsque l'attaque chimique rompt des liaisons qui ont pu se former au cours de l'affaissement des motifs.
AbstractList A method is provided for processing a wafer used in fabricating semiconductor devices. The method can comprise forming high-aspect ratio features on the wafer, which is followed by wet processing and drying. During drying, pattern collapse can occur. This pattern collapse can be repaired to allow for additional processing of the wafer. In some instance, pattern collapse can be repaired via etching where the etching breaks bonds that can have formed during pattern collapse. L'invention concerne un procédé de traitement d'une tranche, utilisé dans le façonnage des dispositifs à semi-conducteurs. Le procédé peut comporter une étape consistant à former des détails à grand facteur de forme sur la tranche, suivie d'un traitement humide et d'un séchage. Au cours du séchage, un affaissement des motifs peut survenir. Ledit affaissement des motifs peut être réparé pour permettre un traitement supplémentaire de la tranche. Dans certains cas, l'affaissement des motifs peut être réparé par attaque chimique, lorsque l'attaque chimique rompt des liaisons qui ont pu se former au cours de l'affaissement des motifs.
Author GALE, GLENN W
SYOMIN, DENIS
FU, QIAN
MIKHAYLICHENKO, KATRINA
LIU, SHENJIAN
WILCOXSON, MARK H
Author_xml – fullname: WILCOXSON, MARK H
– fullname: MIKHAYLICHENKO, KATRINA
– fullname: GALE, GLENN W
– fullname: FU, QIAN
– fullname: SYOMIN, DENIS
– fullname: LIU, SHENJIAN
BookMark eNqNi70OgjAURjvo4N873MTZBIRBx6bcCgn0Nu0FRkJMnUwhwfePDD6Aw5cznPPtxSZOMexE1yCXVIA066yVTnLrQZMDK5nRGVBU19J6BO0QoUcG60ih95V5AGnw2FSKTNEqXl8FdtUqj2L7Gt9LOP14EGeNrMpLmKchLPP4DDF8hp6uSZom9zzJbjLL_qu-lZIzag
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
DocumentTitleAlternate PROCÉDÉ ET APPAREIL POUR LE TRAITEMENT HUMIDE DE DISPOSITIFS À SEMI-CONDUCTEURS SANS AFFAISSEMENT DES MOTIFS
ExternalDocumentID WO2011094038A3
GroupedDBID EVB
ID FETCH-epo_espacenet_WO2011094038A33
IEDL.DBID EVB
IngestDate Fri Jul 19 11:41:50 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
French
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_WO2011094038A33
Notes Application Number: WO2011US20283
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20111208&DB=EPODOC&CC=WO&NR=2011094038A3
ParticipantIDs epo_espacenet_WO2011094038A3
PublicationCentury 2000
PublicationDate 20111208
PublicationDateYYYYMMDD 2011-12-08
PublicationDate_xml – month: 12
  year: 2011
  text: 20111208
  day: 08
PublicationDecade 2010
PublicationYear 2011
RelatedCompanies LAM RESEARCH CORPORATION
GALE, GLENN W
SYOMIN, DENIS
FU, QIAN
MIKHAYLICHENKO, KATRINA
LIU, SHENJIAN
WILCOXSON, MARK H
RelatedCompanies_xml – name: GALE, GLENN W
– name: WILCOXSON, MARK H
– name: LAM RESEARCH CORPORATION
– name: LIU, SHENJIAN
– name: SYOMIN, DENIS
– name: FU, QIAN
– name: MIKHAYLICHENKO, KATRINA
Score 2.8363352
Snippet A method is provided for processing a wafer used in fabricating semiconductor devices. The method can comprise forming high-aspect ratio features on the wafer,...
SourceID epo
SourceType Open Access Repository
SubjectTerms BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Title METHOD AND APPARATUS FOR PATTERN COLLAPSE FREE WET PROCESSING OF SEMICONDUCTOR DEVICES
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20111208&DB=EPODOC&locale=&CC=WO&NR=2011094038A3
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_mFPVNp-LHlIDSt2LXjy17GNKlqVO2pnTdx9tothYE6Yar-O97KZvuaQ-BkCMhObjcR-5-AXhq0cQyqG3qSrnqduIYepJmbTTk5hTtUymTTBUnD4Jmb2S_T51pBT63tTAlTuhPCY6IEjVHeS_K-3r1H8TyytzK9bP8wKHlix93PG2xDfc1TINqXrfDQ-EJpjGGfpsWRCVNQcVZ1LUO4FAZ0gppn4-7qi5ltatU_DM4CnG9vDiHSprX4IRt_16rwfFg8-SN3Y30rS9gPOBxT3jEDbCFoRu58WhI0I0joRsrZFvCRL_vhkNO_IhzMuExCSPB1I0ZvBLhk6Hiugi8EYtxlsfHb0i8hEefx6yn4wZnf_yYTcTuaawrqObLPL0GYlIjsRLZbKToJjltR1oov1Q6tplJOW8tbqC-b6Xb_eQ7OC0DqiqXg9ahWnx9p_eokQv5UDLyF5frhuc
link.rule.ids 230,309,786,891,25594,76904
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwEA9zivNNp-LH1IDSt2LXjy17GNK1qZ22Temyj7fRbB0I0g1X8d_3Ujbd0x4CIUeO5OByH8n9gtBTm6SGRkxdlcZVNVNLU9Ns0QFHbkbAPxUiXcji5DBq-UPzbWJNKuhzWwtT4oT-lOCIoFEz0PeiPK9X_0kst3xbuX4WHzC0fPF411Xm23RfU9eI4va6NGYucxTHgbhNiZKSJqHiDGIbB-iwDUGhRNqno56sS1ntGhXvFB3FwC8vzlAly-uo5mz_Xquj43Bz5Q3djfatz9EopNxnLrYjaHFsJzYfDjCEcTi2uUS2xQ4LAjseUOwllOIx5ThOmCNPzOgVMw8PpNRZ5A4dDrNcOuoD8QI9epQ7vgoLnP7JYzpmu7sxLlE1X-bZFcI60VIjFa1mBmGS1bGEAfpLhGXqCyFm7fk1auzjdLOf_IBqPg-DadCP3m_RSZlcle86SANVi6_v7A6scyHuS6H-Ag1sidI
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=METHOD+AND+APPARATUS+FOR+PATTERN+COLLAPSE+FREE+WET+PROCESSING+OF+SEMICONDUCTOR+DEVICES&rft.inventor=WILCOXSON%2C+MARK+H&rft.inventor=MIKHAYLICHENKO%2C+KATRINA&rft.inventor=GALE%2C+GLENN+W&rft.inventor=FU%2C+QIAN&rft.inventor=SYOMIN%2C+DENIS&rft.inventor=LIU%2C+SHENJIAN&rft.date=2011-12-08&rft.externalDBID=A3&rft.externalDocID=WO2011094038A3