SYSTEM AND METHOD UTILIZING REDUNDANCY IN SEMICONDUCTOR CHIP INTERCONNECTS
An integrated circuit, or combination of integrated circuits, has a primary interconnect, a redundant interconnect, and circuitry connecting the primary and redundant interconnects allowing selection of the redundant interconnect to bypass the primary interconnect. L'invention concerne un circu...
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Main Authors | , , |
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Format | Patent |
Language | English French |
Published |
18.03.2010
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Subjects | |
Online Access | Get full text |
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Summary: | An integrated circuit, or combination of integrated circuits, has a primary interconnect, a redundant interconnect, and circuitry connecting the primary and redundant interconnects allowing selection of the redundant interconnect to bypass the primary interconnect.
L'invention concerne un circuit intégré, ou une combinaison de circuits intégrés, comportant une interconnexion primaire, une interconnexion redondante, et un circuit connectant les interconnexions primaire et secondaire et permettant de choisir l'interconnexion redondante afin d'éviter l'interconnexion primaire. |
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Bibliography: | Application Number: WO2009US55854 |