SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device storing information by using a change in resistance is provided with a sense amplifier (SA), a data latch (LATR) holding the output of the sense amplifier, and a data latch control circuit (LATRC) controlling the latch timing of the data latch in such a manner that it d...
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Main Authors | , , , , , |
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Format | Patent |
Language | English French Japanese |
Published |
29.01.2009
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Subjects | |
Online Access | Get full text |
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