SEMICONDUCTOR MEMORY DEVICE

A semiconductor memory device storing information by using a change in resistance is provided with a sense amplifier (SA), a data latch (LATR) holding the output of the sense amplifier, and a data latch control circuit (LATRC) controlling the latch timing of the data latch in such a manner that it d...

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Bibliographic Details
Main Authors UMEMOTO, YUKIKO, YAMAKI, TAKASHI, IIDA, YOSHIKAZU, HANZAWA, SATORU, TANAKA, TOSHIHIRO, KOTABE, AKIRA
Format Patent
LanguageEnglish
French
Japanese
Published 29.01.2009
Subjects
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