SYSTEM AND METHOD FOR DEFECT LOCALIZATION ON ELECTRICAL TEST STRUCTURES
A method and system for defect localization includes: (i) receiving a test structure (400), e.g. an integrated circuit, that includes at least one conductor (426) that is at least partially covered by an electro-optically active material (410) as to provide an indication about the electrical status...
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Main Authors | , , |
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Format | Patent |
Language | English French |
Published |
24.06.2004
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | A method and system for defect localization includes: (i) receiving a test structure (400), e.g. an integrated circuit, that includes at least one conductor (426) that is at least partially covered by an electro-optically active material (410) as to provide an indication about the electrical status of at least one or more of the conductors of the test structure; (ii) providing an electrical signal to the conductor, such as charge at least a portion of the conductor; and (iii) imaging the test structure by optical means (430) to locate a defect.
Un procédé utilisé dans un système de localisation de défauts consiste en ce qui suit: (i) recevoir une structure test qui comprend au moins un conducteur qui est au moins partiellement recouvert d'un matériau électro-optiquement actif; (ii) envoyer au conducteur un signal électrique tel qu'une charge destinée à au moins une partie du conducteur et; (iii) créer une image de la structure test pour localiser un défaut. |
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Bibliography: | Application Number: WO2003US31398 |