Copper electrodeposition in microelectronics

An electrolytic plating method and composition for electrolytically plating Cu onto a semiconductor integrated circuit substrate having submicron-sized interconnect features. The composition comprises a source of Cu ions and a suppressor compound comprising polyether groups. The method involves supe...

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Bibliographic Details
Main Authors Paneccasio, Jr., Vincent, Lin, Xuan, Hurtubise, Richard, Figura, Paul
Format Patent
LanguageEnglish
Published 06.09.2022
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Summary:An electrolytic plating method and composition for electrolytically plating Cu onto a semiconductor integrated circuit substrate having submicron-sized interconnect features. The composition comprises a source of Cu ions and a suppressor compound comprising polyether groups. The method involves superfilling by rapid bottom-up deposition at a superfill speed by which Cu deposition in a vertical direction from the bottoms of the features to the top openings of the features is substantially greater than Cu deposition on the side walls.
Bibliography:Application Number: US201816030344