Toughness, adhesion and smooth metal lines of porous low K dielectric interconnect structures

• Main Authors: HEDRICK JEFFREY C, LEE KANG-WOOK, TYBERG CHRISTY S, MALONE KELLY
• Format: Patent
• Language: English
• Published: 27.10.2015
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A structure useful for electrical interconnection comprises a substrate; a plurality of porous dielectric layers disposed on the substrate; an etch stop layer disposed between a first of the dielectric layers and a second of the dielectric layers; and at least one thin, tough, non-porous dielectric layer disposed between at least one of the porous dielectric layers and the etch stop layer. A method for forming the structure comprising forming a multilayer stack of porous dielectric layers on the substrate, the stack including the plurality of porous dielectric layers, and forming a plurality of patterned metal conductors within the multilayer stack. Curing of the multilayer dielectric stack may be in a single cure step in a furnace. The application and hot plate baking of the individual layers of the multi layer dielectric stack may be accomplished in a single spin-coat tool, without being removed, to fully cure the stack until all dielectric layers have been deposited.