Dual mode operation having power saving and active modes in a stacked circuit topology with logic preservation

• Main Authors: Werner, Tobias, Chan, Yuen H, Yavoich, Brian J, Bunce, Paul A, Schmitt, David E, Davis, John D, Penth, Silke
• Format: Patent
• Language: English
• Published: 12.06.2018
• Subjects: INFORMATION STORAGE; PHYSICS; STATIC STORES

A system for dual mode operation having power saving and active modes in a stacked circuit topology having logic preservation is provided. The system includes a pre-charge circuit and a sleep mode control circuit for providing a signal to disable a plurality of circuit elements and switching a mode of the system, the sleep mode control circuit being coupled to the pre-charge circuit and further being coupled to a logic function circuit, wherein the plurality of circuit elements comprise logic gates and transistor devices. The system also includes a keeper circuit coupled to the global bitline, and the logic function circuit coupled to a solar bitline, wherein the logic function circuit preserves a state of the solar bitline, the state of the global bitline determines the state of the solar bitline. The system includes an effective pull-up transistor coupled to the sleep mode control circuit and the logic function circuit.