Silicon liner for STI CMP stop in FinFET

• Main Authors: Beasor, Scott, Liu, Jinping, Wang, Haiting, Zhao, Wei, Xu, Yiheng, Shu, Jiehui, Abrams, Todd B
• Format: Patent
• Language: English
• Published: 29.05.2018
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A hardmask is patterned on a first material to leave hardmask elements. The first material is patterned into fins through the hardmask. A layer of silicon is formed on the hardmask elements and the fins in processing that forms the layer of silicon thicker on the hardmask elements relative to the fins. An isolation material is formed on the layer of silicon to leave the isolation material filling spaces between the fins. The isolation material and the layer of silicon are annealed to consume relatively thinner portions of the layer of silicon and leave the layer of silicon on the hardmask elements as silicon elements. A chemical mechanical polishing (CMP) is performed on the isolation material to make the isolation material planar with the silicon elements. A first etching agent removes the silicon elements on the hardmask elements, and a second chemical agent removes the hardmask elements.