Implementing hardware accelerator for storage write cache management for identification of data age in storage write cache

A method and controller for implementing storage adapter enhanced write cache management, and a design structure on which the subject controller circuit resides are provided. The controller includes a hardware write cache engine implementing hardware acceleration for storage write cache management....

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Bibliographic Details
Main Authors Bakke Brian E, Edwards Joseph R, Radhakrishnan Gowrisankar, Gerhard Adrian C, Moertl Daniel F, Galbraith Robert E, Weckwerth Rick A
Format Patent
LanguageEnglish
Published 10.04.2018
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A method and controller for implementing storage adapter enhanced write cache management, and a design structure on which the subject controller circuit resides are provided. The controller includes a hardware write cache engine implementing hardware acceleration for storage write cache management. The hardware write cache engine performs data age identification in storage write cache substantially without firmware involvement for greatly enhancing performance.
Bibliography:Application Number: US201514939961