Bandgap reference circuit
An integrated circuit comprises a first doped region and a second doped region in a substrate. The second doped region is separated from the first doped region by a first spacing. The integrated circuit further comprises a dielectric layer over the substrate and a gate over the dielectric layer. The...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
23.01.2018
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Subjects | |
Online Access | Get full text |
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Summary: | An integrated circuit comprises a first doped region and a second doped region in a substrate. The second doped region is separated from the first doped region by a first spacing. The integrated circuit further comprises a dielectric layer over the substrate and a gate over the dielectric layer. The gate is positioned having the first doped region on a first substrate side of the gate and the second doped region on a second substrate side of the gate opposite the first substrate side of the gate. The integrated circuit also comprises a third doped region in the substrate separated from the first doped region by a second spacing. The integrated circuit further comprises a fourth doped region in the substrate. The gate and the third doped region are coupled with a first voltage supply, and the fourth doped region is coupled with a second voltage supply. |
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Bibliography: | Application Number: US201414458994 |