Non-volatile SRAM memory cell, and non-volatile semiconductor storage device

A first switch transistor and a second switch transistor are turned on concurrently. Thereby a first ReRAM is electrically connected to a first storage node, and a second ReRAM is electrically connected to a second storage node. Complementary SRAM data stored in an SRAM is programmed into a non-vola...

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Bibliographic Details
Main Authors Sakurai Ryotaro, Okuyama Kosuke, Kawashima Yasuhiko, Kasai Hideo, Toya Tatsuro, Taniguchi Yasuhiro, Shinagawa Yutaka
Format Patent
LanguageEnglish
Published 12.12.2017
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Summary:A first switch transistor and a second switch transistor are turned on concurrently. Thereby a first ReRAM is electrically connected to a first storage node, and a second ReRAM is electrically connected to a second storage node. Complementary SRAM data stored in an SRAM is programmed into a non-volatile memory section of a first memory cell and a second memory cell. One of the first switch transistor and the second switch transistor is turned on to electrically connect only the first ReRAM to the first storage node or to electrically connect only the second ReRAM to the second storage node. Hence, the first memory cell or the second memory cell functions as an independent-type cell in accordance with usage. Data is programmed separately into the first memory cell M1a or the second memory cell M1b. Thus memory capacity is increased.
Bibliography:Application Number: US201515329312