Memory apparatus capable of preventing leakage current

A memory apparatus includes a memory sector including N memory blocks and N local bit lines, a pre-charge circuit, and a program sector selector. Each of the N memory blocks includes a plurality of memory cells. Each of the N local bit lines is coupled to memory cells in a corresponding memory block...

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Bibliographic Details
Main Author Huang Kuo-Chun
Format Patent
LanguageEnglish
Published 21.11.2017
Subjects
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
STATIC STORES
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Summary:A memory apparatus includes a memory sector including N memory blocks and N local bit lines, a pre-charge circuit, and a program sector selector. Each of the N memory blocks includes a plurality of memory cells. Each of the N local bit lines is coupled to memory cells in a corresponding memory block. The pre-charge circuit is coupled to the N local bit lines. The program block selector is coupled to the N local bit lines and configured to apply a first voltage to a selected local bit line coupled to a selected memory block during a program mode of the selected memory block. Unselected local bit lines coupled to unselected memory blocks are pre-charged to a second voltage by the pre-charge circuit during the program mode of the selected memory block, thereby avoiding current leakages of the memory apparatus.
Bibliography:Application Number: US201615260306