Multi-die semiconductor structure with intermediate vertical side chip and semiconductor package for same

Semiconductor multi-die structures having intermediate vertical side chips, and packages housing such semiconductor multi-die structures, are described. In an example, a multi-die semiconductor structure includes a first main stacked dies (MSD) structure having a first substantially horizontal arran...

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Bibliographic Details
Main Authors Kong Jackson Chung Peng, Periaman Shanggar, Cheah Bok Eng, Ooi Kooi Chi
Format Patent
LanguageEnglish
Published 07.11.2017
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Summary:Semiconductor multi-die structures having intermediate vertical side chips, and packages housing such semiconductor multi-die structures, are described. In an example, a multi-die semiconductor structure includes a first main stacked dies (MSD) structure having a first substantially horizontal arrangement of semiconductor dies. A second MSD structure having a second substantially horizontal arrangement of semiconductor dies is also included. An intermediate vertical side chip (i-VSC) is disposed between and electrically coupled to the first and second MSD structures.
Bibliography:Application Number: US201615278532