Method, apparatus and system for configuring a protocol stack of an integrated circuit chip

Techniques and mechanisms for configuring an integrated circuit (IC) chip to implement a protocol stack. In an embodiment, a transaction layer of the IC chip is operable to exchange with a link layer of the IC chip transaction layer packets (TLPs) having a format compatible with one defined in a Per...

Full description

Saved in:
Bibliographic Details
Main Authors Wood Aimee D, Ananthakrishnan Avinash N, Song Marcus W, Boswell Brent R, Spry Bryan L, Rangaraj Deepak M, Letendre Adam E, Hayes Robert J
Format Patent
LanguageEnglish
Published 15.08.2017
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:Techniques and mechanisms for configuring an integrated circuit (IC) chip to implement a protocol stack. In an embodiment, a transaction layer of the IC chip is operable to exchange with a link layer of the IC chip transaction layer packets (TLPs) having a format compatible with one defined in a Peripheral Component Interconnect Express™ (PCIe™) specification. Configuration circuitry of the IC chip provides for configuration of a first protocol stack including the transaction layer, circuitry of the link layer and a first physical layer of the IC chip. The configuration circuitry further provides for an alternative configuration of a second protocol stack including the transaction layer, circuitry of the link layer and a second physical layer of the IC chip. In another embodiment, the first protocol stack supports single-ended signaling to communicate TLP information, whereas the second protocol stack supports differential signaling to communicate TLP information.
Bibliography:Application Number: US201514658021