Low leakage and data retention circuitry

An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and...

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Bibliographic Details
Main Authors Hoberman Barry A, Walker William G, Zampaglione Michael A, Cole Andrew, Callahan John M, Hillman Daniel L
Format Patent
LanguageEnglish
Published 01.08.2017
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Summary:An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.
Bibliography:Application Number: US201615137424