Multi-core system with central transaction control
There is provided a multi-core system that includes a lower-subsystem including a first processor and a number of slave processing cores. Each of the slave processing cores can be a coprocessor or a digital signal processor. The first processor is configured to control processing on the slave proces...
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
11.07.2017
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Subjects | |
Online Access | Get full text |
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Summary: | There is provided a multi-core system that includes a lower-subsystem including a first processor and a number of slave processing cores. Each of the slave processing cores can be a coprocessor or a digital signal processor. The first processor is configured to control processing on the slave processing cores and includes a system dispatcher configured to control transactions for execution on the slave processing cores. The system dispatcher is configured to generate the transactions to be executed on the slave processing cores. The first processor can include a number of hardware drivers for receiving the transactions from the system dispatcher and providing the transactions to the slave processing cores for execution. The multi-core system can further include an upper sub-system in communication with the lower-subsystem and including a second processor configured to provide protocol processing. |
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Bibliography: | Application Number: US20080313561 |