Method of operating and apparatus of memristor arrays with diagonal lines interconnect between memristor cells

A method of operating a plurality of memristive cells coupled as a memristor array includes initializing a first select line, and, in parallel for a number of memristor cells in the first select line, determining whether a level of conductance of the memristor cells in the first select line are with...

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Bibliographic Details
Main Authors Buchanan Brent, Merced Grafals Emmanuelle J, Zheng Le
Format Patent
LanguageEnglish
Published 27.06.2017
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A method of operating a plurality of memristive cells coupled as a memristor array includes initializing a first select line, and, in parallel for a number of memristor cells in the first select line, determining whether a level of conductance of the memristor cells in the first select line are within a tolerance of a reference conductance, and, in response to a determination that the level of conductance is not within the tolerance of the reference conductance, adjusting the level of conductance for the memristor cells in the first select line.
Bibliography:Application Number: US201615142995