3D clock distribution circuits and methods

An integrated circuit includes a clock source tier and at least two clock distribution tiers disposed in a vertical stack with the clock source tier. The clock source tier includes a clock circuit. Each of the at least two clock distribution tiers includes a clock distribution circuit. Each clock di...

Full description

Saved in:
Bibliographic Details
Main Author Lin Mu-Shan
Format Patent
LanguageEnglish
Published 14.02.2017
Subjects
AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:An integrated circuit includes a clock source tier and at least two clock distribution tiers disposed in a vertical stack with the clock source tier. The clock source tier includes a clock circuit. Each of the at least two clock distribution tiers includes a clock distribution circuit. Each clock distribution circuit includes at least one pair of cross-coupled inverters.
Bibliography:Application Number: US201514636224