Method of making a non-volatile memory (NVM) with trap-up reduction

A method for forming a semiconductor device includes forming a select gate over a substrate and forming a charge storage layer and a control gate over the select gate. The charge storage layer and control gate overlap a first sidewall of the select gate and the charge storage layer is between the se...

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Bibliographic Details
Main Authors Hong Cheong Min, Loiko Konstantin V, Yin Juanyi
Format Patent
LanguageEnglish
Published 17.01.2017
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method for forming a semiconductor device includes forming a select gate over a substrate and forming a charge storage layer and a control gate over the select gate. The charge storage layer and control gate overlap a first sidewall of the select gate and the charge storage layer is between the select gate and the control gate. A protective spacer is formed, wherein the protective spacer has a first portion adjacent a first sidewall of the charge storage layer and on the substrate, and the protective spacer is thinned. After thinning the protective spacer, a sidewall spacer is formed over the protective spacer, wherein the sidewall spacer has a first portion on the substrate, and the first portion of the protective spacer is between the first sidewall of the control gate and the first portion of the sidewall spacer.
Bibliography:Application Number: US201514945981