Semiconductor memory apparatus performing a refresh operation
A semiconductor memory apparatus may include a refresh mode control circuit configured to enable a row address increase signal when all banks capable of being designated by a bank address in a refresh operation are all designated. The semiconductor memory apparatus may also include and a row address...
Saved in:
| Main Author | |
|---|---|
| Format | Patent |
| Language | English |
| Published |
17.01.2017
|
| Subjects | |
| Online Access | Get full text |
Cover
Loading…
| Abstract | A semiconductor memory apparatus may include a refresh mode control circuit configured to enable a row address increase signal when all banks capable of being designated by a bank address in a refresh operation are all designated. The semiconductor memory apparatus may also include and a row address generation circuit configured to increase a value of a row address when the row address increase signal is enabled. |
|---|---|
| AbstractList | A semiconductor memory apparatus may include a refresh mode control circuit configured to enable a row address increase signal when all banks capable of being designated by a bank address in a refresh operation are all designated. The semiconductor memory apparatus may also include and a row address generation circuit configured to increase a value of a row address when the row address increase signal is enabled. |
| Author | Ko Jae Bum |
| Author_xml | – fullname: Ko Jae Bum |
| BookMark | eNrjYmDJy89L5WSwDU7NzUzOz0spTS7JL1LITc3NL6pUSCwoSCxKLCktVihILUrLL8rNzEtXSFQoSk0rSi3OUMgHiiaWZObn8TCwpiXmFKfyQmluBgU31xBnD93Ugvz41OKCxOTUvNSS-NBgS1MTC0MDAycjYyKUAAA7ZTKN |
| ContentType | Patent |
| DBID | EVB |
| DatabaseName | esp@cenet |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Medicine Chemistry Sciences Physics |
| ExternalDocumentID | US9548100B2 |
| GroupedDBID | EVB |
| ID | FETCH-epo_espacenet_US9548100B23 |
| IEDL.DBID | EVB |
| IngestDate | Fri Jul 19 16:21:56 EDT 2024 |
| IsOpenAccess | true |
| IsPeerReviewed | false |
| IsScholarly | false |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-epo_espacenet_US9548100B23 |
| Notes | Application Number: US201414515821 |
| OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170117&DB=EPODOC&CC=US&NR=9548100B2 |
| ParticipantIDs | epo_espacenet_US9548100B2 |
| PublicationCentury | 2000 |
| PublicationDate | 20170117 |
| PublicationDateYYYYMMDD | 2017-01-17 |
| PublicationDate_xml | – month: 01 year: 2017 text: 20170117 day: 17 |
| PublicationDecade | 2010 |
| PublicationYear | 2017 |
| RelatedCompanies | SK hynix Inc |
| RelatedCompanies_xml | – name: SK hynix Inc |
| Score | 3.0762215 |
| Snippet | A semiconductor memory apparatus may include a refresh mode control circuit configured to enable a row address increase signal when all banks capable of being... |
| SourceID | epo |
| SourceType | Open Access Repository |
| SubjectTerms | INFORMATION STORAGE PHYSICS STATIC STORES |
| Title | Semiconductor memory apparatus performing a refresh operation |
| URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170117&DB=EPODOC&locale=&CC=US&NR=9548100B2 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfZ1LS8NAEMeHUp83jYr1xR4kt2CTtN32EIS8KEIfmEZ6K5u4Yg8moUkRv70z27R60esGln0wOzOb__wW4B6jUImB78DoJ5bABCVFm0tTbnR6b4NU4KZ3FSRpNO4N487TvDtvwHJbC6M4oZ8KjogWlaK9V-q8Ln4usXylrSwfkiU25Y_hzPH1OjsmuLjJdd91gunEn3i65zlxpI-fHeKame22i6f1HkbRnNRfwYtLRSnFb48SnsD-FDvLqlNoyEyDI2_78JoGh6P6f7cGB0qgmZbYWBtheQZORIL2PCNSa75iH6SV_WKiUBTvdcmKTS0A-iQmGDpATKjfWV7IzV6fAwuDmTc0cESL3ewXcbQbu30BzSzP5CUwosBbgmPwI4nvYtHDBn1pS25b0havSQtaf3Zz9c-3azimZaRLBpPfQLNareUtut0quVML9g33qIc3 |
| link.rule.ids | 230,309,783,888,25578,76884 |
| linkProvider | European Patent Office |
| linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfZ1JT4NAFIBfmrrUm6LGus7BcCMWaAs9EBO2oBbaCJjeGsAx9iCQQmP8976Z0upFrzPJZJa8bea9bwBu0Qul6PiOJD1VEgxQMpS5LNOk_vBtlCV46AMOSfKDoRf3H2eDWQsWm1oYzgn95HBElKgM5b3m-rr8ucSyeW5ldZcusKm4dyPDFpvomMHFZU20TcOZTuyJJVqWEYdi8Gwwrpnc65morXfQw9YZZt95MVlRSvnboriHsDvFwfL6CFo0F6BjbT5eE2Dfb967BdjjCZpZhY2NEFbHYIQsob3IGam1WJIPliv7RZKSU7xXFSnXtQBok0hC0ABiQP1OipKuz_oEiOtElifhjObb1c_jcDt39RTaeZHTMyCMAq8kGjo_lPFdFPaxgU5VqqkKVZPXtAvdP4c5_6fvBjpe5I_n44fg6QIO2JayCwdZu4R2vVzRKzTBdXrNN-8bdv2KJw |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Semiconductor+memory+apparatus+performing+a+refresh+operation&rft.inventor=Ko+Jae+Bum&rft.date=2017-01-17&rft.externalDBID=B2&rft.externalDocID=US9548100B2 |