Simultaneous multi-page commands for non-volatile memories

Mechanisms are provided, in a non-volatile memory device comprising a non-volatile memory and a memory controller, for controlling an operation of the non-volatile memory device. The non-volatile memory device receives a single combined memory command for accessing the non-volatile memory. The non-v...

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Bibliographic Details
Main Authors Kuang Jente B, Mukundan Janani, Kim Dongki, Nam Gi-Joon
Format Patent
LanguageEnglish
Published 03.01.2017
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:Mechanisms are provided, in a non-volatile memory device comprising a non-volatile memory and a memory controller, for controlling an operation of the non-volatile memory device. The non-volatile memory device receives a single combined memory command for accessing the non-volatile memory. The non-volatile memory device decodes the row address and the column address for the word-line to be accessed by the single combined memory command. The non-volatile memory device accesses the word-line such that at least a most significant bit (MSB) page and a least significant bit (LSB) page are accessed simultaneously.
Bibliography:Application Number: US201414520403