Semiconductor memory device and memory controller

A semiconductor memory device includes a plurality of string units, each of which includes a plurality of strings of memory cells connected in series, a controller configured to perform an erase operation on the string units, the erase operation including an erase verify operation that is performed...

Full description

Saved in:
Bibliographic Details
Main Author Shirakawa Masanobu
Format Patent
LanguageEnglish
Published 20.12.2016
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
Online AccessGet full text

Cover

More Information
Summary:A semiconductor memory device includes a plurality of string units, each of which includes a plurality of strings of memory cells connected in series, a controller configured to perform an erase operation on the string units, the erase operation including an erase verify operation that is performed per string unit, and a control circuit including a register that stores erase characteristic for at least one of the string units. The control circuit is configured to output the erase characteristic in response to a command from a memory controller.
Bibliography:Application Number: US201414470411