Method and system of compiling program code into predicated instructions for execution on a processor without a program counter
A predicated instruction compilation system includes a control flow graph generation module to generate a control flow graph of a program code to be compiled into the predicated instructions to be executed on a processor that does not include any program counter. Each of the instructions includes a...
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Main Author | |
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Format | Patent |
Language | English |
Published |
29.11.2016
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Subjects | |
Online Access | Get full text |
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Summary: | A predicated instruction compilation system includes a control flow graph generation module to generate a control flow graph of a program code to be compiled into the predicated instructions to be executed on a processor that does not include any program counter. Each of the instructions includes a predicate guard and a predicate update. The compilation system also includes a control flow transformation module to automatically generate the predicate guard and an update to the predicate state on the processor. A computer-implemented method of compiling a program code into predicated instructions is also described. |
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Bibliography: | Application Number: US201313987131 |