Nanowire semiconductor device including lateral-etch barrier region
A semiconductor device includes a semiconductor-on-insulator wafer having a buried oxide layer. The buried oxide layer includes therein opposing etch barrier regions and a gate region between the etch barrier regions. The semiconductor device further includes at least one nanowire having a channel p...
Saved in:
Main Authors | , , , |
---|---|
Format | Patent |
Language | English |
Published |
22.11.2016
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Be the first to leave a comment!