Nanowire semiconductor device including lateral-etch barrier region

A semiconductor device includes a semiconductor-on-insulator wafer having a buried oxide layer. The buried oxide layer includes therein opposing etch barrier regions and a gate region between the etch barrier regions. The semiconductor device further includes at least one nanowire having a channel p...

Full description

Saved in:
Bibliographic Details
Main Authors Yamashita Tenko, Basker Veeraraghavan S, Liu Zuoguang, Yeh Chun-Chen
Format Patent
LanguageEnglish
Published 22.11.2016
Subjects
Online AccessGet full text

Cover

Loading…