Circuit having capacitor coupled with memory element

A circuit includes a capacitor and a memory element. The capacitor includes a first conductive layer, a first terminal, and a second terminal. The first conductive layer includes a first plurality of bars extending along a first direction and parallel to one another, where two adjacent bars of the f...

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Bibliographic Details
Main Authors Shaw Ching-Hao, Kengeri Subramani
Format Patent
LanguageEnglish
Published 01.11.2016
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
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Summary:A circuit includes a capacitor and a memory element. The capacitor includes a first conductive layer, a first terminal, and a second terminal. The first conductive layer includes a first plurality of bars extending along a first direction and parallel to one another, where two adjacent bars of the first plurality of bars have a first capacitance therebetween. The first terminal is coupled with a first bar of the two adjacent bars, and the second terminal is coupled with a second bar of the two adjacent bars. The memory element has an input coupled with the first terminal and an output coupled with the second terminal. The capacitor is configured to inhibit changing a logic state at the input of the memory element.
Bibliography:Application Number: US201414446501